| | Standard Course Syllabus | Course Supervisor | Date of Approval |
| | Dept. of Electrical and Computer Engineering | Klein | 5/05 |
| | 662 | Theory and Design of Digital Computers |
| | 2. | CATALOG DESCRIPTION |
| | Design of general purpose digital computers including arithmetic and control units, input/output, memory subsystems, |
| | interrelation of hardware and software systems, and introduction to microprogramming. |
| | Quarters of Offering | Credits | | Level | Class Meeting |
| | Au, Sp Qtrs. | 3 | U G | 3 cl. |
| | Course Prerequisites |
| | Prereq: 265 or CS&E 360, and 561. |
| | 3. | PREREQUISITES BY TOPIC |
| | Digital design of clocked sequential circuits, programming computers at assembly and machine language levels. |
| | Courses that require this as a direct prerequisite |
| | 761, 762, 765, 766 |
| | 4. | Text(s) and Other Course Materials | Author(s) | Publisher |
| | Computer Organization, 5th Ed. | Hamacher, Vranesic, and | McGraw-Hill |
| | Zaky |
| | References (supplemental reading) |
| | [1] Computer Architecture and Organization, 3rd edition. John P. Hayes, McGraw-Hill, 1997. |
| | [2] Computer Architecture: A Quantitative Approach (The Morgan Kaufmann Series in Computer Architecture and |
| | Design), 3rd Ed., by John L. Hennessy and David A. Patterson, Morgan-Kaufmann Publishers. |
| | 5. | COURSE OBJECTIVES |
| | 1. Students will learn the basic internal design of computers at a logical level including the overall organization as well as |
| | subsystems. (Criterion 3(a)) |
| | 2. Students will design control unit systems to meet the requirements of the instruction set given the computer registers and |
| | hardware. Students will test their designs using computer simulation system, currently on a Unix workstation. (Criteria |
| | 3(c),(k)) |
| | 6. | TOPICS AND (# OF LECTURES) |
| | Design of computer registers, buses, and control lines with timing considerations (5) |
| | Instruction sets and their implementation in register transfers (6) |
| | Hardwired control units (2) |
| | Microprogrammed control units (2) |
| | Simulation of control units using software to verify correctness of control unit design (4) |
| | Memory units including cache memory (4) |
| | Input/Output systems including polling, interrupt and DMA (3) |
| | Additional aspects of computer architecture such as ALU's, pipelined processors, RISC machines, as time permits.(2) |
| | 7. | CLASS MEETING PATTERN | (For example, "3cl." means 3 48-min classes per week.) |
| | 3 cl. |
| | Thursday, August 14, 2008 09:18 AM |
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