Standard Course Syllabus Course Supervisor Date of Approval

Dept. of Electrical and Computer Engineering Bibyk 4/05

721 Digital VLSI Design

2. CATALOG DESCRIPTION

Design and circuit analysis of basic VLSI structures such as adders and registers; custom macro-cell, bit slice, and re-use

design concepts; physical layout design, layout parasitics extraction, use of VLSI layout design tools.

Quarters of Offering Credits
Level Class Meeting

Sp Qtr. 3 U G 3 cl.

Course Prerequisites

Prereq: 323 or grad standing.

3. PREREQUISITES BY TOPIC

Combinational logic design, sequential logic design, basic elements of computer architecture, basic circuit theory, basic

electronic circuit theory, physical electronics

Courses that require this as a direct prerequisite

820

4. Text(s) and Other Course Materials Author(s) Publisher

CMOS VLSI Design: A Circuits and Systems Perspective, Weste and Harris Addison Wesley

3rd Ed.

References (supplemental reading)

[1] Randall L. Geiger, et. al., VLSI Design Techniques for Analog and Digital Circuits, McGraw-Hill, 1990

[2] Glasser & Dpbberpuhl, The Design and Analysis of VLSI Circuits, Addison Wesley, 1985

5. COURSE OBJECTIVES

1. Understanding of VLSI technology (Criterion 3(a))

2. Understanding of CMOS digital circuit design (Criteria 3(c),(e))

3. Understanding of design rules (Criteria 3(c),(e))

4. Understanding of the operation of CMOS digital circuits (Criterion 3(a))

5. Understanding of major VLSI design tradeoffs (Criteria 3(c),(e))

6. Understanding of VLSI design styles (Criteria 3(c),(e))

7. Ability to use VLSI layout editors (Criterion 3(k))

8. Ability to use VLSI circuit simulators (Criterion 3(k))

6. TOPICS AND (# OF LECTURES)

Digital Logic Design (3)

Computer Architecture (4)

Integrated circuit design and choice of design rules (3)

CMOS circuit fabrication and CMOS integrated circuit design (5)

Electrical characteristics and switching speed of CMOS circuits (3)

Design, electrical simulation, and logic simulation using design software (5)

Structured and advanced CMOS design techniques (5)

Dynamic and clocked MOS design (2)

7. CLASS MEETING PATTERN (For example, "3cl." means 3 48-min classes per week.)

3 cl.

Thursday, August 14, 2008 09:19 AM

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