| | Standard Course Syllabus | Course Supervisor | Date of Approval |
| | Dept. of Electrical and Computer Engineering | Valco | 4/05 |
| | 734 | Silicon VLSI Process Technology |
| | 2. | CATALOG DESCRIPTION |
| | Discrete and integrated circuit device design and silicon technologies, VLSI processing procedures, and device measurements |
| | for process development. |
| | Quarters of Offering | Credits | | Level | Class Meeting |
| | Sp Qtr (odd years). | 3 | U G | 3 cl. |
| | Course Prerequisites |
| | Prereq: 432. |
| | 3. | PREREQUISITES BY TOPIC |
| | Basic understanding of semiconductor crystal orientations; physical electronics of semiconductors; PN junctions, BJTs, |
| | MOSFETs |
| | Courses that require this as a direct prerequisite |
| | none |
| | 4. | Text(s) and Other Course Materials | Author(s) | Publisher |
| | Silicon VLSI Technology: Fundamentals, Practice and | Plummer, Deal, and Griffin | Prentice-Hall |
| | Modeling |
| | ISBN: 0-13-085037-3 |
| | References (supplemental reading) |
| | [1] C.Y. Chang and S. M. Sze, ULSI Technology, McGraw Hill 1996 |
| | [2] S.K. Ghandhi, VLSI Fabrication Principles, Wiley 1983 or 2nd edition 1994 |
| | [3] S. Wolf, Silicon Fabrication for the VLSI Era, Volume 1 - Process Technology, 2nd edition, 2000 |
| | [4] S. Wolf, Silicon Fabrication for the VLSI Era, Volume 2 - Process Integration, Lattice Press, 1990 |
| | [5] S. Wolf, Silicon Fabrication for the VLSI Era, Volume 3 - The Submicron MOSFET, Lattice Press, 1995 |
| | [6] K. Valiev, The Physics of Submicron Lithography, Plenum, 1992 |
| | [7] S.A. Campbell, The Science and Engineering of Microelectronic Fabrication, Oxford University Press, 2nd edition, 2001 |
| | 5. | COURSE OBJECTIVES |
| | 1. The student will learn about the processing technologies used for fabrication of silicon VLSI integrated circuits. (Criteria |
| | 3(a),(c),(e),(k)) |
| | 2. The student will develop an understanding of process integration for NMOS, CMOS and MOS memory IC technology. |
| | (Criteria 3(a),(c)) |
| | 3. The students will be exposed to silicon process information pertinent to the interface between process engineers and |
| | integrated circuit design engineers. (Criteria 3(a),(c),(k)) |
| | 6. | TOPICS AND (# OF LECTURES) |
| | Overview of MOS processes (2) |
| | Lithography (4) |
| | CVD and silicon epitaxy (5) |
| | Plasma processing (etching, sputtering, CVD) (4) |
| | Oxidation of silicon (3) |
| | Ion implantation and diffusion (3) |
| | NMOS, CMOS and MOS memory process integration (7) |
| | 7. | CLASS MEETING PATTERN | (For example, "3cl." means 3 48-min classes per week.) |
| | 3 cl. |
| | Thursday, August 14, 2008 09:20 AM |
| | Page 1 of 2 |