By Mohammed Ismail
Professor and Director, The Analog VLSI Lab
email address: ismail@ece.osu.edu

The progress in chip design over the last twenty five years is nothing short of spectacular. In the 70's Gordon Moore, one of the principal founders of Intel predicted that the number of transistors in a chip will increase three times every four years. Moore's Law, as it is now called, has kept the course and is showing no signs of slowing down. Today's chip could have as many as a million transistors. A single chip, the size of a postage stamp,  could actually have a complete electronic system integrated onto it, aka system-on-chip or SOC. This represents a major paradigm shift in chip design.

This article further discusses this new paradigm and its impact on university education and research. It then establishes the need for closer partnerships between universities and industry and demonstrates potential benefits with success stories of Graduate students from the Mixed Signal Electronic Systems group (MISES) sharing their experiences of working closely with industry as an integral part of their graduate programs.

System-on-Chip

It has been estimated that chips incorporating complete systems will reach a global value of USD 20 billion by 2004(Source-Dataquest 1999) while the world wide merchant integrated circuit (IC) chip market will reach USD 235 billion. This represents a rise in SOC components, compared to merchant ICs ,to nearly 9% in 2004 from about 4% in 1998. An example for a commercial SOC is a chip that is used for Automatic Break System(ABS) in cars.

The chip which has over half a million transistors has both analog and digital parts on it. Another SOC that is being envisioned by people in the telecommunications sector is a multi-purpose single chip transceiver allowing a cell phone to be used as a cordless phone at home or in the office for seamless communications, as well as incorporating GPS functionality into it
making it location-aware.

A Paradigm Shift in Chip Design

The new and coming generations of chips require a new generation of highly skilled well trained chip designers with design knowledge at both the circuit and system levels. The increased functionality on a single chip promotes further miniaturization of previously complex  and expensive electronic systems which further stimulates consumer demand  for new products and therefore a demand for chip designers trained to cope with increased complexity on chip. Semiconductor companies need high value designs to put through their increasingly expensive wafer fabrication lines in order to earn sufficient returns on their investments. Such returns cannot be earned from commodity semiconductor chips, hence, again, an increase in the demand for chip designers trained to create these high value designs. Furthermore, advances in chip fabrication permits design cycle times to be significantly shortened. This allows product life cycles to shorten as companies seek competitive advantage over rivals in getting next generation products to market more quickly. This, too, increases the demand for well-trained highly skilled chip designers.
The chip business is witnessing major changes indeed.

Current trends signal the arrival of a new domain of applications encompassing wide bandwidth, high data rate telecommunications, both wireless and wireline, and delivering myriad services such as telephony, cable and internet access. It has become apparent that the chip industry will be driven more  by the needs of  these new applications and less by the traditional driving forces that catered to the computer industry for many years. Memory chips are one obvious example for such traditional commodity chips. Profit margins in the PC industry have decreased significantly. This is being reflected at the stock market where, at the time of preparing this article, big PC players were taking a nose dive, or showing a flat performance at best, while telecommunication, internet backbone and high bandwidth companies kept on adding value. This paradigm shift in chip design requires engineers that are well trained for increased levels of integration on chip.  More specifically,  it will require engineers trained in analog, radio frequency(RF) and mixed analog/digital(mixed signal) integrated circuits and systems.

Closer Ties with Industry

The traditional driving forces which catered to the computer industry have created a situation where most of the education and research programs in universities are more focused on digital chip design, while few programs nation wide cover analog, RF and mixed signal ICs. This created a scenario of severe shortage of chip designers that are well trained for developing the new generations of chips. Education programs at universities have their own limitations as well.  These programs struggle to keep pace with an ever changing technological world. Many schools are not sufficiently staffed to make these transitions as readily as their industrial counterparts. Faculty are often overloaded and hiring of new professors is not a common occurrence in many departments. University programs on chip design or VLSI (Very Large Scale integration), as we know them today, have started in the mid 80's and were pioneered with people like Prof. Carver Mead of Caltech and Prof. Patricia Conway of the University of Michigan. Their efforts together with the efforts of many others have lead to the creation of the MOSIS facility in California which provides a low cost fast-turnaround chip fabrication to assist universities in their VLSI research and education. Students create their chip designs for a class project or for a thesis research using software design tools.  They then send them to MOSIS,  earlier on magnetic tapes and now over the internet, for fabrication. The fabricated chips come in about eight weeks for testing and report writing.
 

To set up and maintain a chip fabrication line is beyond university budgets. Without the MOSIS facility, which has mainly been funded by the federal government (NSF), universities would not have been able to conduct VLSI research or integrate VLSI into their curricula to train chip designers with the relevant and timely training needed by industry. While this scenario has been adequate a decade ago and perhaps through the 90's, the new paradigm shift in chip design requires more involvement on the part of the semiconductor industry.  Transistor feature sizes are going to deep sub-micron, down to 0.18 micrometer today. Designers have to deal with tough issues pertaining to the physical making of a microchip that implements a complete system with analog, RF and digital parts on it.
 

More than ever before, a close partnership between university and industry is becoming essential to meet the challenges of the new paradigm and provide the critical mass of well trained engineers for future chip design needs.  This partnership will help expose students and faculty at universities to real practical problems and design issues and allow students and faculty to share resources and have access to modern VLSI fabrication technologies at industry. Evolving and different system standards, e.g. GSM and CDMA-One for Cell phones, bring different design challenges when integrated on chip. Student awareness and appreciation of these kinds of challenges and of other issues related to physical design, design for test, quality assurance, etc. can only be gained through close interaction with industry. The student Coop program, or both graduate and undergraduate students, could be a very useful way towards this end.

Success Stories

The Mixed Signal Electronic Systems (MISES) Group at Ohio State has a program of research and education in VLSI with a strong emphasis on analog,  RF and mixed signal. The program has been in existence for over a decade now and has interacted with the semiconductor industry in the US and abroad.  Since 1990, the program has graduated over 20 Ph.D students and as many as 75 MS students(Thesis option). Many of these graduates are now working at leading semiconductor companies.  Recently, Texas instruments, Inc. has recognized Ohio State as a ` target analog university` and has provided funding for 7 TI fellowships.  Further, the program has attracted many visiting scholars from abroad. Currently, the program has 7 visiting scholars, one from each of Brazil, France and Turkey, two from Egypt, and two from South Korea. Many of the students in the program, particularly at the graduate level, spend a period of time working at, or with,  industry as an integral part of their research.

Below, we share their stories told in their own words. In no particular order,  each student discusses his/her experience  with the company or companies he or she has been working with:

Hassan Elwan
Mixed-Signal Wireless, Texas Instruments, Dallas and Nokia Research Center, Finland

I am a Ph.D. student working with the Analog VLSI group. My research interest is in realizing low voltage low power circuits for wireless applications. I greatly benefited from my 6-month co-op with Texas Instruments. Such an experience allowed me to identify research problems that are of benefit to the industry and hence lead to a more practical Ph.D. topic. Currently I am working on a project for highly integrated wireless base stations that is funded by Nokia. Again, the work brings a very important industrial perspective that makes my research more timely and relevant.
 

Chi-Hung (George) Lin
Wireless IC Design Center, IBM, Boston

I joined the Analog VLSI lab in 1995 and am currently pursuing the Ph.D. degree. My research topic deals with high Frequency analog to digital converters for next generations of Wireless Communications. I am currently a coop with the wireless IC design Center at IBM. My work is directly related to my Ph.D. topic and I have access to the lastest high speed technologies at IBM like their new SiGe technology for RF applications. The most impact I feel is that industry is more realistic and elegant in research.

Projects are more demanding than at school. A beautiful thing is that what you see in industry is the elite work of the professional field. we want everything the best of the best! This experience helps me to review and promote my research from small scratches to a completed piece. For example, the way in industry significantly helps the students to think and see deeply and broadly with every possibility in the design. Also this process happens very fast compared with the process at school.
 

Jerasimos Zohios
RF IC Design Group,Texas Instruments,Dallas

I first joined OSU as a Master's student during Fall 1994. I worked under the supervision of Dr. Patrick Roblin in the area of quantum electronics and received my M.S. in August 1996. Since Fall 1996 I have been a Ph.D. student working under Dr. Mohammed Ismail in the area of RF IC design. Between June 1998 and January 1999 I was with Texas Instruments Inc. in Dallas, TX as a co-op.  During that period I got involved in the design of a dual-band GSM/DCS1800 transceiver chip in BiCMOS technology.  I learned how to use state of the art CAD tools such as Analog Artist  and HP-ADS and designed a subcircuit of the above chip. I was extremely impressed by my supervisor's design experience as well as his character.

During the last two months at TI I was actually working exclusively on my doctoral research (oscillator design). I had a lot of support in terms of software tools and interaction with many experienced designers. The result was the design of a fully integrated 2.2 GHz VCO that meets GSM requirements. I am currently waiting for my design to come back from the fab and then I will possibly go back to get measurement results. The strong ties between the Analog VLSI Lab and TI have boosted my engineering knowledge and have provided me with real working experience, not to mention an open door for employment after graduation.

Mona Mostafa Hella
Computer Applications Enhancement, Intel corporation,Chandler,AZ

I started my Ph.D. in Spring 97, working on RF IC design. This summer I joined Intel corporation in Chandler, AZ as a coop. I am currently working on implementing a transmitter for high speed digital interface between a personal computing device, the idea of working on a big system with a large group of people in a leading company like Intel is very beneficial. In industry, things are completely different from Academia, you are basically selling something to others, and this thing should not only work, but has to satisfy very tight specifications, and perform properly under all conditions.  Considering the very fine details and  effects is very important. Although it has been a short time now that I have been in Intel,  I am amazed at how these people interact together to get the work done fast.

Siraj Akhtar
Lucent Technologies,columbus and Allied Signal,columbia, Maryland

I begun my MS in 1993 and am now working on my Ph.D. with Professor Patrick Roblin. The present focus of my work is on RF power transistor modeling for power amplifier design. During my MS we interacted with Allied Signal in Columbia, Maryland, on modeling Silicon on Insulator (SOI) devices. My advisor had a grant from them that allowed me to perform my research.

While Allied Signal was big on SOI then, I wasn't directly working on a specific project for them. My advisor and I defined my own tasks and goals. However, I sent them regular reports and went over once to their offices to give a presentation on my work. The feedback that I got from them was immensely valuable.  You think that you understand a problem well and can simulate it and explain it, but when you meet with experts out there in the field working on practical problems, you realize how different things really are. The interaction with Allied Signal helped me understand this point and set the stage for my next project.

My current project on RF power transistors is sponsored by Lucent Technologies here in Columbus. The very fact that Lucent is right here in town has aided my interaction with them by having more frequent visits and presentations. Further since other new students are also working on this project, I have been interacting and helping them whenever possible. This has helped me enhance my skills in communicating and understanding both experts in the field and novices alike. The work for Lucent is a well defined project with specific goals and targets that has formed an excellent dissertation topic for me.  It has exposed me to a broad real life problem that needs an implementable solution--a true blend of theoretical and experimental work which is a valuable asset in the RF and microwave field.

Tuna B. Tarim
Texas Instruments Mixed-Signal Wireless Group,Texas Instruments,Dallas

My research topic is on statistical design and yield enhancement of low voltage analog VLSI circuits. To produce cost-effective, manufacturable analog and mixed-signal chips, circuit designers must work to enhance functional yield. This is even more critical for submicron low voltage designs since random variations do not scale down with feature size or supply voltage. Moreover, with current trends of higher levels of integration leading to complete mixed-signal systems on a chip, yield loss due to the analog part must be minimized such that it has little effect on the yield of the mixed-signal chip.

I was a coop at Texas Instruments, Inc. (TI), Dallas, Texas between July 1998 - April 1999, in the Mixed-Signal Wireless group. I worked on the same topic as in my Ph.D. dissertation, and needless to say the coop helped me to get practical experience in applying my work to the latest technologies. The coop also helped you to get familiar with many design and simulation tools. The training possibilities is another advantage. I've attended many short courses given by active and well known experts in their areas. A coop is a mutual benefit; having a good experience as a coop might change many things in a students life. The goal should be to try and make a mutual benefit, and this gives big responsibility to both the student as well as the company.

Xiaopeng LI and Yue Wu
Royal Institute of Technology and Ericsson Radio Systems, Kista, Sweden

We joined the Analog VLSI lab in September, 1997. Our research interest is in analog and RF ICs for multi-standard wireless communications. This summer we are with the Radio Electronics Lab(REL), Royal Institute of Technology, Sweden as visiting students . Currently we have two joint projects with students from Sweden, one is on Multi-standard ADC and the other is on `Bluetooth` RF front-end chip sets. Kista, where the lab is located, is the "Silicon Valley" of Sweden. Many world-famous IT companies, including Ericsson, Nokia, IBM, etc., have their research centers here. We can easily interact with those engineers, who have the most advanced experience in Analog and RF IC design. More importantly, we can use state-of-the- art CAD tools with fully-installed design kits for latest processes and can test our chips in their very advanced labs. Especially, the Joint Radio Research program we have with Ericsson, Inc. provides us the opportunity to directly collaborate with Ericsson Radio System AB in our projects.

Hong-Sun Kim
RF IC Design Group, Texas Instruments,Dallas

I am a Ph.D student of Dr. Ismail at the Analog VLSI Lab.  I am doing research on RF IC design at both the circuit and system levels of integrated transceivers for digital wireless communications. I was at Texas Instruments, Inc. Dallas, TX for six months as a co-op student. When I was there, I was involved in one big project to design GSM/DCS transceiver. While I was doing my job, I have learned a lot of things.  I found that there are many practical points that I did not face when I was in school. Sometimes, when you work only in academic enviorments, you may ignore some practical problems. Based on that exprience, I can realize what is more important in research, and I can build my own ideas. I am now spending an internship with two other students from the Lab, at the Swedish Royal Institute of Technology, Radio Electronics Lab in Stockholm, Sweden where I work closely with students of the institute and engineers at Ericsson Radio Systems nearby the institute.

Students currently spending internships at industry Sang-Won and Neng-Tze(Abu) Wong at Texas Instruments, Dallas and Yiwu Tang at columbus.

For more information about the MISES group and the VLSI Lab, please visit our webpages at

http://www.ece.osu.edu/mises

http://www.ece.osu.edu/VLSI (Back to previous page)