ECE 764 - Functional Verification of Hardware Designs

Fall 2008

Prof DeGroat's home page:: BACK

Course Syllabus: ECE764/Syllabus_FA08.doc

LECTURES

Lecture 1: Course Intro:  ECE764/Lectures/Lect 1-Course Overview.ppt

Lecture 2:  Floating Point Addition Project

Project:  Description: ECE764/Project 1 FPA/FPA.doc

              Sample Test Vector File:  ECE764/Project 1 FPA/fpmvectors

(note that these are for multiplication not addition)

Behavioral VHDL Reference Code:    Code has been removed until next offering of course

Support Package for Behavioral Model:

Data Flow Model *** to be verified ***:

Gen Vec routine for reference of reading data from a file:

A possibly correct model 10/13/08:

Floating Point Lecture 1: ECE764/Lectures/Lect 2a -IEEE Floating Point Units.ppt

Floating Point Lecture 2: ECE764/Lectures/Lect 2b -IEEE Floating Point Adder Arch.ppt

Lecture 3:  Directed Random Test: ECE764/Lectures/Lect 3 - Directed Radom Test.ppt

Material Covered

W 1 :  Lect 1

F 2 :  Floating Point Project and through slide 8 of FP Lect 1

M 3:  Remainder of Lecture 1

W 4:  Lecture 2 through the adder of the PFA

F 5:  Lecture 2 from renormalization