FIR Filtering with TI TMS320C55x: Prelab
Summary: Students examine a section of TI TMS320C55x assembly code and determine results by hand. The instructions implement a simple finite impulse response (FIR) filter and include multiplication of fractional numbers using two's complement representation.
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Assembly Exercise
Analyze the following lines of code. Refer to Two's Complement and Fractional Arithmetic
for 16-bit Processors, Addressing Modes for TI TMS320C55x,
and the Mnemonic
Instruction Set manual for help.
1 FIR_len .set 3
2
3 ; Assume:
4 ; BK03 = FIR_len
5 ; AR2 = 1000h
6 ; AR3 = 1004h
7 ; FRCT = 1
8
9 BSET AR2LC ; sets circular addressing for AR2
10 BSET AR3LC ; sets circular addressing for AR3
11
12 mov LO(AC0),*AR3+
13 mov #0, AC0
14 rpt (FIR_len-1)
15 macm *AR2+,*AR3+,AC0
Text following a "
;" is considered a comment.
In this case, the comments indicate the contents of the
auxiliary registers, the BK03 register, and the address registers before the execution of
the first instruction, mov.
The line FIR_len .set 3 uses the assembler directive .set to define the name FIR_len as equal to 3. The BK03 register contains the length of the
circular buffer we want to use for auxiliary register 0 through 3. The BSET AR2LC modifies the increment operator + so that it
behaves as a circular buffer. This means that the address registers will be incremented until the
(memory-address mod value-in-BK03) = 0.
Note that any number
followed by an "
h" or preceded with a
0x represents a hexadecimal value.
Example 1
1000h and 0x1000 both refer to the decimal number 4096.
Assume that the data memory is initialized as follows starting
at location
1000h.
Figure 1: Data Memory Assignment (before execution)
|
Refer to the Mnemonic
Instruction Set manual to familiarize yourself with the syntax and operation of three assembly language instructions:
mov,
rpt, and macm. Then, step
through each line of code and record the values of the
accumulator AC0, auxiliary register
AR2 and auxiliary register AR3 in the spaces provided
in Figure 2. Additionally, record the value
of the memory contents after all three instructions have been
executed; use the data memory table provided in Figure 3.
Figure 2: Execution Results
|
When working through the exercise, take into account that the
accumulator
AC0 is a 40-bit register and that the
multiplier is in the fractional arithmetic mode. The mode is set by the assembler directive FRCT=1.
In this mode, binary words are interpreted as
fractions, and the multiplier treats them accordingly.
This is done by applying a one bit left shift to the multiplication result in the ALU.
DSP numerical representation and arithmetic are described further in Two's Complement and Fractional Arithmetic
for 16-bit Processors.
Figure 3: Data Memory Assignment (after execution)
|
Prelab Submission
For the prelab exercise, each student should submit the following:
- Register contents recorded in Table 2.
- Register contents recorded in Table 3.
- A brief description of each component appearing in line 12 of the given code:
12 mov LO(AC0),*AR3+
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Last edited by Lee Potter on Mar 27, 2007 9:38 pm GMT-5.